HPC Track

One of the ACM Europe Conference main topic is covering HPC. The track will compose of the keynote talk by Prof Kathy Yelick on “Breakthrough Science at the Exascale” and it is followed by a panel, composed by top world experts in HPC. The panel will review progress and current plans for the worldwide roadmap towards Exascale computing and will be moderated by by Thomas Skordas, Director for Digital Excellence and Science Infrastructure at the European Commission.

The HPC technical track will take place on the 8th of September from 14:00 until 16:30.

Panel Composition

Mr Thomas Skordas, Director DG CONNECT

Thomas Skordas received his diploma in Electrical Engineering in 1984 from University Aristotle of Thessaloniki, Greece, and the PhD in Computer Science in 1988, from the Institut National Polytechnique de Grenoble, France. From 1988 to 1995, Thomas worked in Grenoble, France as a Research Fellow and as project leader in EU-funded R&D projects in the areas of Information Technology and Robotics.
In 1995, Thomas joined the European Commission as a Research Programme Officer in the Information Society Technologies Programme, part of the Directorate General Information Society & Media (DG INFSO).
Ever since, Thomas worked in various units of DG INFSO (which, in 2012 became DG CONNECT) dealing with ICT research in the context of EU’s Research Framework Programmes. From 2006 to 2009, he was Deputy Head of Unit in ICT Security and Trust. In July 2009, Thomas was appointed Head of the Photonics Unit and on 1st February 2014, Head of the Flagships Unit. Finally, on 1st March 2017 he was appointed Director of “Digital Excellence and Science Infrastructure”.

Prof. Mateo Valero

Mateo Valero, is full professor at Computer Architecture Department at the Universitat Politècnica de Catalunya and the Director Barcelona Supercomputing Center. His research focuses on high-performance computer architectures.

Professor Mateo Valero obtained his Ph.D. in Telecommunications from the Technical University of Catalonia (UPC) in 1980. He has been teaching at UPC since 1974; since 1983 he has been a full professor at the Computer Architecture Department. Since May 2004, he has been the director of Barcelona Supercomputing Center, the Spanish national supercomputing centre. His research is in the area of computer architecture, with special emphasis on high performance computers: processor organization, memory hierarchy, systolic array processors, interconnection networks, numerical algorithms, compilers and performance evaluation. His main awards: Seymour Cray, Eckert-Mauchly, Harry Goode, ACM Distinguished Service. He is Honorary Doctorate by 9 Universities. He is a fellow of IEEE and ACM and is and Intel Distinguished Research Fellow. He is member of 5 academies.

Prof. Paul Messina

Dr. Paul Messina is Advisor to the Associate Laboratory Director and Laboratory on Exascale and Argonne Distinguished Fellow at Argonne National Laboratory.

His current role is Project Director for the U.S. DOE Exascale Computing Project, a multi-laboratory project. During 2008-2015 he served as Director of Science for the Argonne Leadership Computing Facility and in 2002-2004 as Distinguished Senior Computer Scientist at Argonne and as Advisor to the Director General at CERN (European Organization for Nuclear Research).

From 1987-2002, Dr. Messina served as founding Director of California Institute of Technology’s (Caltech) Center for Advanced Computing Research, as Assistant Vice President for Scientific Computing, and as Faculty Associate for Scientific Computing, Caltech. During a leave from Caltech in 1999-2000, he led the DOE-NNSA Accelerated Strategic Computing Initiative.

In his first association with Argonne from 1973-1987, he held a number of positions in the Applied Mathematics Division and was the founding Director of the Mathematics and Computer Science Division.

Prof. Satoshi Matsuoka

Satoshi Matsuoka has been a Full Professor at the Global Scientific Information and Computing Center (GSIC), a Japanese national supercomputing center hosted by the Tokyo Institute of Technology, and since 2016 a Fellow at the AI Research Center (AIRC), AIST, the largest national lab in Japan. He received his Ph. D. from the University of Tokyo in 1993. He is the leader of the TSUBAME series of supercomputers, including TSUBAME2.0 which was the first supercomputer in Japan to exceed Petaflop performance and became the 4th fastest in the world on the Top500 in Nov. 2010, as well as the recent TSUBAME-KFC becoming #1 in the world for power efficiency for both the Green 500 and Green Graph 500 lists in Nov. 2013. He is also currently leading several major supercomputing research projects, such as the MEXT Green Supercomputing, JSPS Billion-Scale Supercomputer Resilience, as well as the JST-CREST Extreme Big Data.

He is a fellow of the ACM and European ISC, and has won many awards, including the JSPS Prize from the Japan Society for Promotion of Science in 2006, awarded by his Highness Prince Akishino, the ACM Gordon Bell Prize in 2011, the Commendation for Science and Technology by the Minister of Education, Culture, Sports, Science and Technology in 2012, and recently the 2014 IEEE-CS Sidney Fernbach Memorial Award, the highest prestige in the field of HPC.

Mrs. Alison Kennedy

Alison Kennedy is Executive Director of EPCC, the High Performance Computing center based at the University of Edinburgh and a member of the Board of Directors of PRACE (Partnership for Advanced Computing in Europe). She is also a member of the Executive Council of the European Data Infrastructure EUDAT. She began her working life as a real time systems programmer in industry and has now worked in HPC at EPCC for over 20 years, managing large collaborative projects in HPC and Data.



Prof. Per Stenström

Per Stenström is a professor of computer engineering at Chalmers University of Technology since 1995. His research interests are on design principles for high-performance computer systems with an emphasis on high-performance memory systems. He has authored or co-authored four textbooks and more than a hundred publications in international journals and conferences. He is regularly serving program committees and acting as editor for major conferences and journals in the computer architecture field: ISCA, HPCA, ACM TACO among others. He is a Fellow of the IEEE and ACM and a member of the Royal Swedish Academy of Engineering Science, the Academia Europaea, and the Spanish Royal Academy of Engineering.


Prof. Qian Depei

Qian Depei, professor at both Sun Yat-sen university and Beihang University , dean of the School of Data and Computer Science of Sun Yat-sen University.

He has been working on computer architecture and computer networks for many years. His current research interests include high performance computer architecture and implementation technologies, distributed computing, network management and network performance measurement.

Since 1996 he has been the member of the expert group and expert committee of the National High-tech Research & Development Program (the 863 program) in information technology. He was the chief scientist of three 863 key projects on high performance computing since 2002. Currently, he is the chief scientist of the 863 key project on high productivity computer and application service environment.